I have blogged before on how to import Xilinx ISE projects in Sigasi before. In this blog post I show how you can import an existing Vivado project into Sigasi.
If you have a Vivado project which uses one or more IP cores, the project becomes complex quickly. Vivado generates different sources for Simulation and Synthesis. And although VHDL has elegant support for this –entities can have multiple architectures–, Vivado generates duplicate entities instead.
This whitepaper explains why programmers tend to cling to the text editors they are used to using and are not always eager to move to a standardized product. Here we explain why a standardized text editor, one that is complete Integrated Development Environment (IDE), benefits the development organization.
In the past, in Europe, each country’s railroads used a different width for their train tracks. When a train leaving, say, France, went into Spain, the train would have to stop and unload its cargo and load it onto a different train at the border.
Although project setup in Sigasi is in most cases straight forward, it remains a hurdle, certainly if you already have a 'project definition' in another tool. I have blogged about Scripting Sigasi project creation for importing custom project descriptions before. But now we extended the Python scripts to make even easier to import Xilinx ISE and Mentor Graphics HDL Designer projects. In this post I show how easy this has become.
Software with good documentation is far more valuable than software without.
Software that needs to be reliable will be subject to a code review. Good documentation makes the review go more smoothly, and makes it more likely that the review will accomplish its intended purpose.