The LEON3/GRLIB project from Airoflex Gaisler (formerly Gaisler Research) is one of the largest open source VHDL projects. It contains almost 700 VHDL files, for a total of 600.000 lines of code. The project is based on the AMBA on-chip bus and serves as a framework for building SoCs. It is used in consumer electronics, automotive and aerospace applications. LEON3/GRLIB can be intimidating at first. But once you get your feet wet, there is a lot to be learned. A lot more than from reading that book that's lying on your desk! Some interesting questions are:

• Should I use libraries? How can I organize them?
• Can I make my code portable across different ASIC technologies and FPGA families?
• How do I configure different versions of my hardware design?
• How can I organize an on-chip bus structure?
• Which naming conventions could I use?

In this webinar, Sigasi's founder and CEO, Philippe Faes will teach you how to navigate and understand complex hardware designs using Sigasi HDT. He will explain the basic structure of LEON3/GRLIB and point out the naming conventions used. This webinar is recommended for hardware designers and project managers working on SoCs or large digital designs. It starts on Wednesday, 2010-02-17 at 15:00 CET and it will take about 45 minutes.