General comments and ideas

I just found out about this product from the FPGA and VHDL usenet newsgroups. This product represents a set of features I wanted for a long time, and no tool vendor with an IDE (ISE, Aldec, ModelSim...) yet provides. I was even going to write my own Eclipse-based program to do it, but now I don't have to. It's about time the hardware community has the IDE features that the software community has had for a while now.

I like the choice of an Eclipse-based front end as it is both open source and ubiquitous. What VHDL front end do you use to parse and compile the VHDL files with?

Feature Requests:
Code style (re)formatting (re: Eclipse)
Code completion (i.e. list the objects that can be used in the given context, subfields of a record)
Display declaration/type information on mouse hover (You guys are close but I want a little more information)
Have the ability to make a properly ordered compile script for use in implementation tools
Column editing mode (Yes I read the FAQ, but this is important for many copy/paste edits and case statements)
Create a javadoc like comment system that allows for certain comments to display when the mouse is hovering over objects, types, entities, and subprograms

---Matthew Hicks

Hi Matthew, Thanks for your

Hi Matthew,

Thanks for your feedback. It's good to hear that people share our vision of what hardware design should be.

Let's go over your feature requests:

>Code style (re)formatting (re: Eclipse)
That's on the roadmap.

>Code completion (i.e. list the objects that can be used in the given context, subfields of a record)
I'm sure you've tried our current code completion (CTRL+SPACE). We'll work on making this more context-aware.

>Display declaration/type information on mouse hover (You guys are close but I want a little more information)
Can you give a specific example of what you would like to see in the hover pop up?

>Have the ability to make a properly ordered compile script for use in implementation tools
That's on our roadmap.

>Column editing mode (Yes I read the FAQ, but this is important for many copy/paste edits and case statements)
You've read the FAQ: it's on its way...

>Create a javadoc like comment system
Problem here is that there is no industry standard documentation system for VHDL. We do show comments of a given object (entity, signal,...) in its hover popup, so that may help a little. More specifics on this feature request are welcome.

Hope you enjoy our tool and stay tuned for updates!

Philippe

Hi pfaes, If VHDL does not

Hi pfaes,

If VHDL does not have a standard for comments, can you not borrow some of it from javadoc or anything that's reasonable? Obviously you won't copy all the tags like @serial, @serialField, etc. I am thinking it would it can look something along like:

  --<< This would would tell HDT to automatically make a closing '-->>' when enter is pressed
  -- @param_in signal1 The '--' should be automatically there when going to a new line
  -- @param_out signal2
  ... etc
  -->>

Since VHDL '93 does not have support for multi-line comments, making it a pain to write comments to begin with (a reason I believe much VHDL code is poorly commented!). A feature where you can highlight text and be able to comment it out would be nice (Altera's Quartus editor has this).

Another feature I would like to see is the code folding found in Visual Studio where you can do something like:

  #region This is where cool stuff happens
     Code goes here
  #endregion

And be able to view/hide the code snippet, useful when your file grows very large. To make the code portable you could make it where HDT looks for something else like --@region --@endregion.

Hi, Code folding is on the

Hi,

Code folding is on the roadmap. Defining a new standard for VHDL comments is not.

There is a block comment command (edit -> comment or CTRL+SHIFT+/) and a block uncomment command.

Which ever convention you use for writing VHDL comments, you can easily read comments that correspond to a given object, just by hovering over that object. (demonstrated in one of our screencasts.

Request: Mac OSX version.

Request: Mac OSX version. Please try to port this to the Mac. You've got a linux version, and OSX is based on BSD, so it seems it's just a matter of using Apple's free development tools to change the UI.

I see more and more engineers moving to the mac, and if you provided the only vhdl solution for the mac that didn't need XP virtualized, I think it would sell well.

Thanks for the tool!

Brian

Porting to Mac is certainly

Porting to Mac is certainly an option if enough people would use it. On the other hand: the fact that no EDA software is currently available on Mac, is not a good indication.

(comment typed on a MacBook Air :-)

Philippe

Congratulations on a great

Congratulations on a great looking product. As others have already commented, I also was looking for similar capabilities in a tool, especially symbol browsing similar to Visual Studio's. It's precisely what I had hoped for when I looked at the product description on your website.

Beyond this, I was somewhat surprised and very delighted that, just minutes after downloading and installing the beta, the tool had already helped identify and fix a number of frustrating little problems in the test project. The project is a rather large public domain distribution that had heretofore undiagnosed problems in its testbench, which prevented it from simulating.

Again, kudos to the project team on a fantastically useful product. I look forward to it reaching maturity and general availability.

Along those lines, I was disappointed to find that the code browser would not browse into library modules. The type information displays correctly, which is already an improvement, but the ability to visit the code immediately would be very useful. Other comments I might have include configurable keymappings. The shortcut reminders work nicely to help teach the default mappings, but I would ultimately want to customize to better match already established finger habits.

Hi Mike, Thanks for your

Hi Mike,

Thanks for your enthusiastic feedback.

We'll probably make library modules viewable somewhere in the future, so that you can inspect library code.

You can easily configure shortcuts: "window->preferences" and then "general->keys".

Also take a look at http://www.sigasi.com/faq#n69 for a sheet with useful keyboard shortcuts and http://www.sigasi.com/faq#n53 on how to customize your tool.

cheers

Philippe

I would like to add my

I would like to add my congratulations as well to a very slick looking VHDL IDE!

It is so refreshing to see a new product that support VHDL first :-) However, having said that for a commercial IDE you do have to support the other languages as well since most designs are at least bilingual.

It is also good to read that you have developed your own VHDL parser, this will open up a whole new world of static linting, code beatification, IP-XACT wrapper generation, code translations (e.g. VHDL2008 back to VHDL2002) and your advertised hardware refactoring. The later one looks particular interesting.

Good luck with the product, I will report some bugs as soon as I find them,

Hans
www.ht-lab.com

Thank you Hans for your

Thank you Hans for your compliments.

We do realize that Verilog is important, and as you surely have noticed on the FAQ, we have it on our roadmap.

Looking forward to your bug reports :-)

Philippe

A great start! One thing I

A great start!
One thing I would need
When part of a large group of engineers under svn control I cannot put all the files in a single directory. Unless I have missed it, at the moment the files all need to be in the project directory.

And something I would like :)
Have you thought about the fact that when the cursor is at a certain position there are only a few things that can legitimately be typed. For ocasional VHDL users (I am just comming back after a couple of years) and slow typers it would speed me up a lot if I could select keywords etc which are in scope from a list.
Also a list of all the signals, variables and generics which are in scope at a given moment would mean I would never spell a signal wrongly again which would be great.
Best regards
Rob

Hi Rob, you can of course use

Hi Rob,

you can of course use sub-directories. Just point Sigasi HDT to the top folder.

Regarding your second question. It is already there:
You can use context sensitive autocomplete by pressing CTRL-SPACE.

If your top folder contains

If your top folder contains too many subdirectories, you can exclude a few. Another options is to include only a few subdirectories (See the "VHDL Libraries" page in the manual).

As an alternative to

As an alternative to selecting the top folder for a project, you can point Sigasi HDT to the specific folder you want to edit. Then, you can import the other folders as "external" folders. Check the User Manual, chapter on VHDL Libraries.

Auto complete can be accessed

Auto complete can be accessed by typing a few characters and pressing CTRL+SPACE. This command will show a pop up with all relevant signal names, key words and others.

The same command can be used to start writing common syntactic constructions (e.g. a signal declaration; just type "sig" and press CTRL+SPACE to get an entire signal declaration). You can also save yourself a lot of keystrokes if you're typing component declarations or instantiations.

Also check out a short screencast on this topic: http://www.sigasi.com/node/30

After playing around with the

After playing around with the new version for a while, I found it awkward to be required to save a file before I was alerted of errors and warnings. Can you make it more like Java in eclipse, where it compiles as you type? This way my cursor will be right there and I can easily make the required edits.

---Matthew Hicks

We certainly want to

We certainly want to implement this. But this is technically not so easy. Therefore we first want to iron out most other compiler issues before we focus on live compiling.

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