missing Makefile-Settings in project properties

Posted Tue, 2010-07-13 15:54 by Josy_F

Hi sigasi Team,

1)
2010-06-28 release notes mention that automatic Makefile generation now is configured per project.
But project properties of projects don't show Makefile-properties for me.

I tried to set up a new project with current version of sigasi HDT but even this project does not show Makefile-settings on project's property page.

Do I have to globally enable Makefile generation to get these entries in project's property pages?

2)
There is no possibility to leave Preference page for Xilinx (Window->Preferences->VHDL->Xilinx) if you don't have Xilinx-tools installed (except pressing 'Cancel'). You cannot navigate to another menu entry (e.g. Templates) because of an error message: 'The currently displayed page contains invalid values'.

Regards
Josef

‹ Error adding port to design Editor does not select tokens properly and block mode error at semicolon ›

automatic Makefile generation

by philippe.faes (Sigasi) - 2010-07-14 08:55

Hi Josef,

We've made a mistake in our last release. The plugin that is responsible for Makefiles (and for most of the interfacing with external tools) was not packaged in the plugin version. However, it is packaged in the standalone version of Sigasi HDT.

The workaround is to use the standalone version for now.

This problem has been fixed in our internal version, and will be released later this month.

I'm sorry for the trouble.

Philippe

invalid values

by philippe.faes (Sigasi) - 2010-07-14 08:58

Hi Josef,

Thanks for letting us know about the broken page validation. I've made a note that we should fix this (ticket:860).

kind regards

Philippe

ticket:860 was fixed in

by philippe.faes (Sigasi) - 2011-01-30 11:25

ticket:860 was fixed in October 2010

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