Which VHDL 2002/2008 features do you need?

Posted Thu, 2010-07-08 11:10 by philippe.faes (Sigasi)

From your mails, tweets and posts, we hear that many people would indeed like to have a fully VHDL-2008 compliant tool chain. We're only one tool in that chain, but we sure want to be part of the solution, not the problem.

We have previously implemented (parts of) post-93 features in Sigasi HDT:

  • Protected types
  • External signals

But there is still a long list ahead of us. Here are some of things that have been added in the 2008 version alone (thanks to Doulos for reading carefully through the LRM):

  • Generics for packages and subprograms
  • Generic types, subprograms and packages
  • PSL (Property Specification Language)
  • New condition operator, ??
  • Enhanced bit string literals
  • Hierarchical names
  • Vectors in aggregates
  • Conditional and selected sequential statements
  • Extensions to generate
  • Simplified sensitivity lists
  • Arithmetic on std_logic_vector
  • lots of changes in the standard libraries
  • New construct: "context"

Few people realize that there are so many new features. Some are useful, others never should have been in the standard. We will not strive to implement all of these features in the near future. Instead, I'd like to ask you for input. Which features are you using? Which features would you like to use if the tools supported them?

Please let me know in the comments section.

‹ Create inverse entity Custom console parsing ›

VHDL-2008 Updates

by Jim Lewis (not verified) - 2010-09-30 06:18

I plan on using all of them as soon as vendors implement them.
My highest priority ones are:
* Generics for packages and subprograms
* Generic types, subprograms and packages
* PSL (Property Specification Language)

My lowest priority ones are:
* New condition operator, ??
* Vectors in aggregates

Since a number of simulators and synthesis are well into their implementations, I would guess that a tool that fails to implement them in a timely fashion would be left behind.

VHDL-2008 in tools

by philippe.faes (Sigasi) - 2010-09-30 14:33

Hi Jim,

Nice to hear that you are interested in using VHDL 2008. Can you share with us which simulators and synthesis tools are implementing VHDL 2008? I hope you are correct that all tools will support the new standard soon. However, I'm not too optimistic since even today, not many tools have moved past the VHDL-93 standard.

Kind regards

Philippe

VHDL 2008 in tools

by kopepi - 2010-11-15 10:01

Dear Sigasi team,

I would like to throw my two cents in there to back Jim's request for Package and subprogram generics and Generic types, subprograms and packages first.
I, however, do not use PSL but I would like to see the following supported in no particular order :
- Extensions to generate
- Conditional and selected sequential statements
- Contexts

Regarding tools support, I know that Synopsys' Synplify already supports VHDL-2008 syntax and Design Compiler's next release will support some VHDL-2008 features.

Aldec has a great webinar that highlights the great new features

by Kevin.Stanton - 2010-11-19 22:45

http://www.aldec.com/Events/default.aspx

"VHDL 2008: Powerful, Easier to Use VHDL"

Yes, generics

by Martin Thompson (not verified) - 2010-11-24 10:33

I'd also go with Jim's list, all the "generic" related things first.

Simplified sensitivity lists would also make my life easier in testbench-land.

Hi Martin, Thanks for your

by philippe.faes (Sigasi) - 2010-11-25 13:16

Hi Martin,

Thanks for your input. I think we can put the sensitivity list in soon. The extra generics, especially the type and package generics, will take more time

kind regards

Generics for packages are now

by philippe.faes (Sigasi) - 2011-02-15 15:21

Generics for packages are now supported: http://www.sigasi.com/update_20110214

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