This is a proposal for a Master of Science Engineering Thesis. In order to apply, please read the page on Internships and Thesis Proposals.
- Project: Master of Science in Engineering thesis
- Skills: VHDL, Java, Eclipse
- Target audience: electronics or computer science engineers
Unit testing and test driven development are well established practices in software engineering. Most major programming languages have an xUnit implementation (JUnit for Java, PyUnit for Python and so on).
In hardware engineering, there are no widely accepted test driven methodologies. While most hardware design is done in programming languages (VHDL and Verilog), there is still no VHDLUnit framework.
Your mission is to create a VHDLUnit framework for VHDL. You will research the various xUnit implementations, talk to VHDL designers online and propose a new VHDLUnit. You will implement VHDLUnit in VHDL, with extra functionality in Java or scripting languages.
The best engineers have excellent communication skills. This thesis is not only about building a complex software product, but also about listening and talking to your end-users. If successful, you will have contributed to the way electronic engineering is taught and practiced.
Further reading.