Sigasi HDT 1.0 is an advanced development environment for VHDL designers. (Learn about Sigasi 2.0.)

Sigasi HDT is an intelligent development environment (IDE). It differs from other development tools in that it contains an ultra-fast VHDL parser and compiler that runs transparently in the background. At any given moment as you make modifications, the tool fully understands the design in terms of VHDL concepts. This technology makes it possible to support a wide range of powerful features:

Intelligent navigation

Navigate to any VHDL object in the design by selecting it in a hierarchical view. Or directly navigate from an object to its declaration.

Instant error reporting

Get immediate feedback on errors introduced by a modification.

Intelligent code completion

Use the tool to assist in completing VHDL constructs based on its knowledge of the design.

Quickfixes

Fix errors by using a quickfix proposed by the tool.

Refactoring

Use the tool to make sophisticated code transformations that preserve the behavior of the design.

Click here for a list of all features

All these features create a novel user experience that greatly improves productivity.

The last feature in the list, refactoring, is Sigasi HDT's most innovative and powerful functionality. Refactoring is a modern software development technique. Sigasi HDT makes it available to the VHDL designer. It can be used to make code clearer and more reusable, to find bugs, and to add new functionality. Sigasi HDT supports a range of automated refactorings, for tasks such as the following:

• intelligent rename of VHDL objects over the whole design
• making all modifications to add or remove a port in a single action
• making all modifications to add or remove a connection in a single action
• modifying design hierarchy

More about automated hardware refactoring.