VHDL Blog

Posts that will make you a better VHDL designer, regardless of the tools you use.

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Clock edge detection

Posted Mon, 2012-04-09 18:27 by philippe.faes (Sigasi)

There are two largely accepted ways to detect clock edges, and many style books prescribe or prefer one over the other.
Let's investigate.

Coding conventions

Posted Fri, 2012-04-06 08:39 by philippe.faes (Sigasi)

Style guides can be a religion. Like religion, style guides can help people make the right choices. But also like religion, style guides can make people stick to unjustified dogma and block any constructive dialogue.

There are many coding conventions and style guide books around. Many contradict each other and many style rules are not (or no longer) based on practical arguments. There will never be a style book that will be accepted by the entire VHDL community, and that's fine.

Advanced VHDL Configurations: Tying a component to an unrelated entity

Posted Thu, 2012-03-22 21:25 by philippe.faes (Sigasi)

Usually, people use VHDL configurations to select a given architecture for their component, or even to set generics that were not set in the instantiation. But you can also do more advanced stuff with configurations: you can tie a component to a completely unrelated entity. You can even re-wire the signals!

For a short recap.

Custom VHDL code formating

Posted Wed, 2012-03-07 20:42 by heeckhau (Sigasi)

A few people asked me recently if the VHDL code formater in Sigasi can be customized to their code style. So I decided to write a blog post about so it can easily be Googled.

Can the formatter of Sigasi be customized? (The short answer is No. The long answer is Yes.)

Technically speaking we (the Sigasi developers) can easily modify code formatting. But we did not create a user interface to do this. The reason is that there are so many rules (and corner cases). So creating a UI to customize formatting would be a too much work for the added value it brings.

VHDL generation from Yakindu state charts with Xtend

Posted Mon, 2012-02-27 11:41 by heeckhau (Sigasi)

Last month I was introduced to Yakindu, an open-source-toolkit for model-driven development of embedded systems. One component of the Yakindu toolkit supports the graphical development of finite-state machines: the Yakindu Statechart Tools (SCT). Although I'm personally rather skeptical to graphical development tools and prefer textual entry with visualization, the Yakindu Statechart Tools seemed really powerful. For example, SCT supports hierarchical states, parallel states, …