Dear Beta user,

In this release we worked on better error recovery for our parser and general usability issues.

When your are developing a VHDL design, your design is in an unfinished and often erroneous state all the time. Therefore it is important that Sigasi HDT can give good warning and error messages even for incorrect and unfinished code. This is a difficult technical challenge, but we continuously work on improving Sigasi HDT's problems messages and recovery quality. In this release we focused on statements (especially on missing or incorrect start and end labels) and generic and port lists.

We also improved the UI by offering the Search references action not only in the editor view, but now also in the Search menu.

We also enabled the rename refactoring in the outline and hierarchy views.

Please let us know what you think about this new release in the comments or on our user forum.

The Sigasi Team.

P.S.: If you never did an update before, see the FAQ for more information on updates.