Sigasi internship proposal 2021 - 2022
- Skills: Java or Typescript
- Target audience: computer science engineers, electronics engineers, master of informatics
Sigasi develops an IDE for digital design in SystemVerilog, Verilog or VHDL. The Sigasi IDE provides the digital designer with all the facilities that are typically reserved for software developers such as syntax checking, navigation, project management, refactoring and autocompletion.
In this internship we provide you with the opportunity to participate in the core development of the Sigasi tools. Depending on your skill level you will be responsible for such things like fixing small bugs all the way up to improving the UI experience, detecting invalid VHDL/(System)Verilog constructs, dealing with performance issues, improving the tools' compatibility with the (System)Verilog/VHDL standards, …
You will be participating in the discussions among the lead developers and have the chance to genuinely impact the end result delivered to the customer.
This internship takes place in 2021 or 2022, at the Sigasi office, close to the city center of Ghent. For more information about this internship proposal, contact firstname.lastname@example.org.