public boolean canApply(Applicant applicant) {
    var degrees = Set.of("Computer Science", "Informatics");
    return (applicant.isMaster() || applicant.isPhD()) &&
            degrees.contains(applicant.getDegree());
}

Sigasi develops an Integrated Development Environment (IDE) and a command line lint tool for digital hardware design in SystemVerilog or VHDL. The IDE provides all the facilities that are typically enjoyed by software developers such as syntax checking, navigation, project management, refactoring, autocompletion… In addition, both the IDE and the command line tool can run hundreds of lint checks on your digital design and report any and all violations.

Sigasi flags violations immediately - as you type. As a consequence, its lint checks have been selected and optimized for speed. Our goal is to flag violations in a sub-second timeframe. Nonetheless, we are aware that there are many more lint checks that can provide valuable feedback to the end-user.

In comes Infer, a static program analyzer for Java, C, C++, Erlang, Hack, C#, Ada… It has its roots in academic research on Separation Logic, a theory on formal verification of software, was built on the work of researchers at University College and Queen Mary University of London, and is now deployed within Meta where it continuously verifies select properties of every code modification for the main Meta apps.

Infer’s internal architecture is largely language agnostic. The goal of this internship is to extend Infer with a VHDL front end. This should be feasible since Ada is already implemented on top of Infer in a commercial product. Ada formed the inspiration for the initial definition of the VHDL language.

Still, there are many open questions. Can Infer deal well with a dataflow language in which every VHDL process is considered to be executed simultaneously? Infer is capable of incremental analysis: will Infer be able to provide feedback that is fast enough to incorporate into an IDE? Which of Infer’s analyses are applicable to VHDL? If feedback arrives with some delay (a couple of seconds), can it still be presented to the end user in a meaningful way?

You will work in close cooperation with the core engineering team of Sigasi. Your contributions will have a lasting impact on Sigasi’s understanding of this problem domain and will directly impact strategic choices made.