Presentation by Titouan Vervack at EclipseCon France 2017 on 2017-06-21.
See also
- VHDL 2017: new and noteworthy (legacy)
- Using Sigasi Studio's Graphics Configuration (legacy)
- VHDL IEEE 1076-2017 Grammar (blog post)
- Making sense of HDL Verification Methodologies (opinion)
- Verification Frameworks - Break the Loop (webinars)