Truncation in integer literals

Sigasi validates sized integer literals and warns when the specified size is too small to represent the value (rule 182).

VERILOG
module test;
    // 5 is 3'b101, so it requires 3 bits.
    // With size 2, the value is truncated to 2'b01.
    int retry_limit = 2'd5;

    // Correct: size matches the number of bits required.
    int safe_retry_limit = 3'd5;
endmodule

Rule configuration

This rule can be disabled for your project, or its severity and parameters can be modified in the project linting settings. Alternatively, it can be manually configured using one of the following templates, depending on the type of project you use.

For Modular Projects, add these entries to your project's .sigasi/settings.json settings file. To scope the settings to a specific folder or file instead of the whole project, place them inside an @override block; to scope them to a specific target, place them inside a @targets block.
JSONC
```
{
    "verilog.rules.182.severity": "{ERROR|WARNING|INFO|IGNORE}"
}
```
For Classic Projects, add the VHDL lines to .settings/com.sigasi.hdt.vhdl.linting.prefs and the Verilog/SystemVerilog lines to .settings/com.sigasi.hdt.verilog.linting.prefs:
PREFS
```
182/severity/${path}={error|warning|info|ignore}
```