Locally unused port, argument or parameter declaration

A port, parameter or argument declaration that is never used locally, does not contribute anything to a design and can be an indication of a coding error.

VERILOG
module my_module#(parameter A = 10, B = 20)(logic input unused_port, logic input used_port);
    initial $display(B);
    wire logic p = (used_port);
endmodule

VERILOG
function f(int x, y);
    int a = (y);
endfunction

Rule configuration

This rule can be disabled for your project, or its severity and parameters can be modified in the project linting settings. Alternatively, it can be manually configured using one of the following templates, depending on the type of project you use.

For Modular Projects, add these entries to your project's .sigasi/settings.json settings file. To scope the settings to a specific folder or file instead of the whole project, place them inside an @override block; to scope them to a specific target, place them inside a @targets block.

JSONC
{
    "verilog.rules.169.severity": "{ERROR|WARNING|INFO|IGNORE}",
    "verilog.rules..parameters.check_unused_ports": {true|false},
    "verilog.rules..parameters.check_unused_arguments": {true|false},
    "verilog.rules..parameters.check_unused_virtual_method_arguments": {true|false},
    "verilog.rules..parameters.check_unused_parameters": {true|false}
}

For Classic Projects, add the VHDL lines to .settings/com.sigasi.hdt.vhdl.linting.prefs and the Verilog/SystemVerilog lines to .settings/com.sigasi.hdt.verilog.linting.prefs:

PREFS
169/severity/${path}={error|warning|info|ignore}
/params/check_unused_ports/${path}={true|false}
/params/check_unused_arguments/${path}={true|false}
/params/check_unused_virtual_method_arguments/${path}={true|false}
/params/check_unused_parameters/${path}={true|false}