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Locally unused port, argument or parameter declaration

A port, parameter or argument declaration that is never used locally, does not contribute anything to a design and can be an indication of a coding error.

VERILOG 
module my_module#(parameter A = 10, B = 20)(logic input unused_port, logic input used_port);
    initial $display(B);
    wire logic p = (used_port);
endmodule
VERILOG 
function f(int x, y);
    int a = (y);
endfunction

Rule configuration

This rule can be disabled for your project, or its severity and parameters can be modified in the project linting settings. Alternatively, it can be manually configured with the following template:

TEXT 
169/severity/${path}={error|warning|info|ignore}
/params/check_unused_ports/${path}={true|false}
/params/check_unused_arguments/${path}={true|false}
/params/check_unused_virtual_method_arguments/${path}={true|false}
/params/check_unused_parameters/${path}={true|false}