C style equality operators

VHDL compares with = and /=, not with the == and != operators of C, Verilog, and most other languages (LRM 9.2.3). Sigasi flags C style equality operators as errors. A quick fix replaces the operator with its VHDL equivalent.

C style equality operator

== is not a VHDL operator. Use = to test for equality (rule 15).

if count == MAX_COUNT then -- C style operator
  done <= '1';
end if;

if count = MAX_COUNT then  -- VHDL equality
  done <= '1';
end if;

C style inequality operator

!= is not a VHDL operator either. Use /= to test for inequality (rule 16).

if state != IDLE then -- C style operator
  busy <= '1';
end if;

if state /= IDLE then -- VHDL inequality
  busy <= '1';
end if;