Choices in case statements

The choices of all case statements together must represent every value of the expression’s subtype, each value exactly once, and others may also only appear once, as the last alternative (LRM 10.9). Sigasi checks this for case statements, case generate statements (LRM 11.8), and selected signal and variable assignments (LRM 10.5.4, 10.6.4, 11.6).

The examples below use the following declaration.

VHDL
type state_t is (IDLE, RUN, DONE);
signal state : state_t;

‘others’ has to be the last alternative in a case statement

Since others stands for every remaining value, alternatives following it can never be reached and are flagged as an error (rule 9).

VHDL
case state is
  when IDLE   => null;
  when others => null; -- RUN still follows
  when RUN    => null;
end case;

case state is
  when IDLE   => null;
  when RUN    => null;
  when others => null; -- last alternative
end case;

Only one ‘others’ choice is allowed

The first others already covers every remaining value. Duplicate others alternatives don’t add anything and are marked as an error (rule 10).

VHDL
case state is
  when IDLE   => null;
  when others => null;
  when others => null; -- duplicate 'others'
end case;

Case statement does not cover all cases

Every value of an expression’s subtype needs to be represented by an alternative. Sigasi reports a case statement that leaves values uncovered as an error (rule 11). A quick fix adds the missing choices.

VHDL
case state is -- DONE is not covered
  when IDLE => null;
  when RUN  => null;
end case;

case state is
  when IDLE => null;
  when RUN  => null;
  when DONE => null;
end case;

For a std_logic or std_logic_vector expression, alternatives for '0' and '1' alone do not cover the subtype: the metavalues 'U', 'X', 'Z', 'W', 'L', 'H', and '-' must also be covered.

VHDL
signal enable : std_logic;
...
case enable is -- 'U', 'X', 'Z', 'W', 'L', 'H', and '-' are not covered
  when '0' => null;
  when '1' => null;
end case;

case enable is
  when '0'    => null;
  when '1'    => null;
  when others => null;
end case;

Cannot combine ‘others’ with other choices

others has to be the only choice of its alternative. Combining it with other choices is an error (rule 12). A quick fix replaces the whole choice list by others.

VHDL
case state is
  when IDLE         => null;
  when RUN | others => null; -- 'others' already includes RUN
end case;

case state is
  when IDLE   => null;
  when others => null;
end case;