Duplicate design units

When multiple files that contain design units with the same names are compiled to the same library, simulators and synthesis tools would use the design unit that is compiled last. However, it might not be a good idea to rely on compilation order in such cases. Thus, Sigasi reports a warning for each duplicate design unit.

• print.vhd:

  library ieee;
  use ieee.std_logic_1164.all;
  use ieee.numeric_std.all;
  
  -- Duplicate design unit 'work.print_result', also declared in file 'out_result.vhd'
  entity print_result is
        port(clock, op : in std_logic;
             result    : in std_logic_vector(31 downto 0));
  end print_result;
  

• out_result.vhd:

  library ieee;
  use ieee.std_logic_1164.all;
  use ieee.numeric_std.all;
  
  -- Duplicate design unit 'work.print_result', also declared in file 'print.vhd'
  entity print_result is
        port(clock, op : in  std_logic;
             fin_res   : out std_logic_vector(31 downto 0);
             result    : in  std_logic_vector(31 downto 0));
  end print_result;
  

Rule configuration

This rule can be disabled for your project, or its severity and parameters can be modified in the project linting settings. Alternatively, it can be manually configured with the following template:

64/severity/${path}={error|warning|info|ignore}