A “declaration not found” error is shown when Sigasi Visual HDL encounters a name (such as a signal, port, variable, or package) that has not been formally introduced or declared in the current scope or any accessible scope.
When using Sigasi Projects, a Quick Fix is offered for design units such as VHDL entities or Verilog/System Verilog modules that are being instantiated but cannot be found. When applying this Quick Fix, Sigasi Visual HDL will search for other projects that declare this missing unit. It will then suggest adding the appropriate dependency to your project setup to make the missing unit visible and resolve the compilation error.