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Muspark Technologies Pvt. Ltd. announces the distribution of Sigasi®

2025-07-10

Bangalore, India / Ghent, Belgium - July 10th, 2025 Muspark Technologies announces the distribution of Sigasi® which empowers hardware design and verification engineers to reduce development time, … (more ...)

Muspark Technologies Pvt. Ltd. announces the distribution of Sigasi®

G3TEK Embedded Technologies expands its product offering by distributing Sigasi®

2025-07-09

Ankara, Türkiye / Ghent, Belgium - July 9th, 2025 G3TEK Embedded Technologies and Sigasi announce the start of their distribution agreement in Türkiye. Sigasi Visual HDL empowers hardware design and … (more ...)

G3TEK Embedded Technologies expands its product offering by distributing Sigasi®

Sigasi makes programming much easier at Zimmer

2025-06-25

From traditional screen-printing systems to cutting-edge digital textile and carpet printing technology, ZIMMER AUSTRIA has been at the forefront of innovation since its inception more than 150 years … (more ...)

Sigasi makes programming much easier at Zimmer

Sigasi at FPGA Conference

2025-06-25

From Tuesday 1st to Thursday 3rd of July, Sigasi will again be at the FPGA Conference in Munich, Europe’s leading specialist conference for programmable logic devices. You are welcome to stop by … (more ...)

Sigasi at FPGA Conference

Sigasi at DAC

2025-06-23

Come and see us at DAC to discover our brand new Sigasi Visual HDL 2025.2 and how it will help to save you time and money in your next chip design! When the first picture above arrived it was still … (more ...)

Sigasi at DAC

2025.2 Release

2025-06-20

Transformative state machine improvements The 2025.2 release of our Visual HDL platform brings the focus to your design by enhancing your designing and debugging experience. The all-new Sigasi View … (more ...)

2025.2 Release

11 Myths about IDEs

2025-06-17

ElectronicDesign published an article on the myths about IDEs that have emerged (and need to be debunked) by our VP of Business Development, Dirk Seynhaeve. Let’s be real: The debate over whether … (more ...)

11 Myths about IDEs

Dekimo uses Sigasi to drastically improve productivity and code quality

2025-06-09

Dekimo, a leading independent electronic services supplier in Belgium, the Netherlands, France and Germany, has been using Sigasi for quite some time. We are delighted about that, as customer … (more ...)

Dekimo uses Sigasi to drastically improve productivity and code quality

Sigasi streamlines VHDL and Verilog development at Socomate

2025-06-01

Socomate International is providing both conventional and phased array UT electronics for automated inspections systems. Based near Paris, Socomate has been providing Ultrasonic instrumentation to … (more ...)

Sigasi streamlines VHDL and Verilog development at Socomate

2025.1 Release

2025-03-20

Additional enhancements with Sigasi Visual HDL 2025.1 The first release of Sigasi Visual HDL in 2025 features various UX improvements, a new VHDL linting rule and improved VHDL highlighting. Sigasi … (more ...)

2025.1 Release

2024.3 Release

2025-01-09

Enjoy the Smoothest Ride with Sigasi Visual HDL 2024.3 Our latest release is all about giving you the smoothest coding experience. With.. improved menus, inline links to diagrams & views, context … (more ...)

2024.3 Release

Sigasi Visual HDL Reviewed in Electronic Engineering

2024-09-30

In September 2024, the Electronic Engineering Journal’s Max Maxfield published a review of Sigasi Visual HDL (SVH). From the Article “So, what’s the big deal—isn’t this just … (more ...)

Sigasi Visual HDL Reviewed in Electronic Engineering

Say Hi to Sigasi Visual HDL 2024.2

2024-09-24

In May 2024, Sigasi announced a new comprehensive portfolio design to help hardware designers and verification engineers catch specification errors earlier in the chip design cycle and fix the … (more ...)

Say Hi to Sigasi Visual HDL 2024.2

Third Installment of System-Level Design "Experts at the Table" Published by Semiconductor Engineering

2024-09-05

Sigasi’s VP for Business Development, Dirk Seynhaeve, joined colleagues from Arteris, Keysight, Siemens EDA, and Synopsys for a round table discussion about the future of system-level design, … (more ...)

Third Installment of System-Level Design "Experts at the Table" Published by Semiconductor Engineering

Sigasi in EE Times on Domain-Specific Computing

2024-08-20

On 15 August 2024, EE Times published an opinion piece by Sigasi CEO Dieter Therssen, about the future of domain-specific computing. From the Article From all accounts, chip design is on a path toward … (more ...)

Sigasi in EE Times on Domain-Specific Computing