Download rate is increasing fast
12,000 Downloads and Counting
It took us more than one year to get to 10,000 downloads. In less than 2 months, 2,000 more downloads were done. Our mission to empower design and verification engineers to save time and costs for their team/company pays off.
A full-featured IDE
From the strong base of Sigasi Studio, an HDL code checker, editor, and browser, we’re growing into a purpose-built, full-featured HDL platform tailored for VHDL & SystemVerilog. Sigasi® Visual HDL™ is quickly becoming a must-have for design and verification teams:
- On-the-fly linting and real-time bug detection to catch and fix errors.
- Live previews of FSM diagrams and interactive graphics to visualize and facilitate navigation.
- Ultra-performant coding support and a lightning-fast built-in compiler to boost both speed and quality.
All this live while the RTL code is written, IP is reused, or even when AI generated code is integrated.
Our users have embraced it. Since its launch on June 19th, 2024, Sigasi Visual HDL has been downloaded +12,000 times from the VS Code marketplace, not counting the direct downloads from our website! And the speed is ramping up from 650 downloads per month between June 2024 and September 2025 to over 2,000 per month now. We are just getting started!
To put that into perspective, Sigasi Studio reached just 9,000 installs over three years. That’s how fast adoption is this time.
This new milestone means the world to us — and it’s all thanks to you, customers and community. From the bottom of our heart:
🧡 THANK YOU!
If you haven’t yet tried Sigasi Visual HDL, now’s the time to download it from the VS Code marketplace .
- 👉 Use the completely free Community Edition (for non-commercial use in academics, research or evaluation).
- 👉 Request a trial license for a professional try-out including a free initiation demo so you don’t have to figure it out by yourself.
Sigasi webinars
You can watch all our webinars on linting, visualization and navigation, Verification Frameworks and more for free, made by our experts with decades of experience in designing chips! Join us live or watch a recording at your most convenient time.
Together, we’re shaping the future of design and verification productivity.
2025-12-11, last modified on 2025-12-11