A next-generation solution from Sigasi for design and verification @DAC18

Sigasi has been redefining digital hardware design for 10 years now and is presenting its newest generation of technology at DAC 2018 in San Francisco.

Sigasi Studio drastically improves the workflow for hardware design and verification engineers and helps the creative process of code design. Our customers designing FPGAs and ASICs, including those facing heavy compliance standards (like the ISO 26262 and DO-254 standards) are reporting significant drops in the time spent reviewing and validating their projects.

We have used this experience and the industry best practices to create the next-generation of Sigasi Studio …


Sigasi presents Sigasi Studio 4.0

Sigasi 4.0 is the newest release of the trusted productivity software for VHDL and SystemVerilog design and verification. We have developed many new features for our SystemVerilog users.

We have developed new visual tools for feedback and navigation of your project. Our latest Block Diagrams, Finite State Machine and Hierarchy features deliver views that help our users with validation on code, gives them insights in the project and make reuse of legacy code much easier.


Sigasi introduces Sigasi Studio XPRT

The need for new visual tools for SystemVerilog and VHDL has grown into a new product in the Sigasi Studio line: Sigasi Studio XPRT.

This ‘expert’ tool (“LOL”) has integrated all new features for visual feedback and navigation with a flexible integrated documentation feature into the XPRT product. All SystemVerilog and VHDL users now have access to features with Block Diagrams, Finite State Machine and Hierarchy Views.

And of course, like all Sigasi technology: they already work with unfinished code and are delivered with immediate (‘type-time’) feedback.


Visit the Sigasi booth # 2351 at DAC 2018.