Agentic Engineering: what happens when an agent stops handling isolated tasks
Beyond the prompt
Our next webinar on October 14th is about Agentic Engineering*: when an AI agent starts working an entire engineering objective end to end: planning the steps, choosing which tools to call at each stage, and carrying context from one action into the next.
Two workflows, live
In our last webinar on Agentic AI, we showed how a coding agent can call Sigasi Visual HDL in VS Code through MCP and generate or modify HDL, get deterministic feedback on the real project, refine, repeat. That was agentic AI applied to one task at one time inside one IDE (VS Code with Copilot).
This time we’re going further, much further. We’re building a complete session around two real life agentic engineering demos.
Requirements in, project out.
In our first demo, we start from a set of design requirements and let an agent create and configure a complete HDL project from scratch — no scaffolding provided in advance. For this demo’s purpose we don’t let Sigasi work in real-time correcting the agent. Instead, we turn Sigasi loose on what the agent built.
The interesting part isn’t that an agent can generate a project; it’s what Sigasi finds after the agent has declared the job done. If you’ve ever wondered what “my AI chip design agent says it’s finished” is actually worth, this is the demo that answers it directly.
Existing codebase in, downstream workflow out.
In the second demo, we start from an existing codebase. The AI agent turns it into a Project, and instead of guessing at how the files fit together, it asks Sigasi for a compilation recipe — the compile order plus library mappings and dependencies, generated from the actual project rather than reconstructed by the model. The agent then uses the compilation recipe to drive a downstream simulation workflow.
This is a concrete look at agents doing the unglamorous, time consuming, error-prone plumbing work of a project setup correctly, because they’re working from real project information instead of a guess.
The tooling behind it
In our June webinar, the agent reached Sigasi through MCP inside VS Code. This time, it’s Sigasi CLI — the same project-aware analysis, called from the command line, which is what lets an agent use it as one tool among several in a broader, scripted workflow rather than only inside an editor session. Through the Sigasi CLI, an AI agent can verify the full project, pull structured diagnostics, retrieve compilation order and compilation recipes, and generate documentation in real-time.
We’ll also show daemon mode. An agent iterating on a design doesn’t call an analysis tool once — it modifies, checks, modifies again, sometimes dozens of times in a single session. Daemon mode keeps the project loaded between calls, so the first invocation runs at normal speed and every one after that only processes what changed. That’s the difference between an agent loop that stays fast through fifty iterations and one that grinds to a halt by the tenth.
All of the Sigasi processing happens on-prem or in your VPC. Sigasi never stores design data outside your own environment: your sensitive RTL codebases, IP, documentation, and internal telemetry never leave your infrastructure.
Alongside the tooling, we’ll talk about Sigasi skills — the reusable, task-specific instructions that tell your agent(s) how a particular kind of HDL work should be done: how to set up a project, when to check diagnostics, how to reason about compilation order.
- Skills guide the agent’s process;
- Sigasi CLI gives it the deterministic project facts to act on.
Neither one replaces the other, and the webinar will show them working together on both demos.
Who this webinar is for
For everyone working in chip design convinced or still skeptical about AI (which you should be if you’re using AI without Sigasi). Design or verification engineer working in Verilog, VHDL, or SystemVerilog, CAD or methodology owner, working/deciding on how (or whether) coding agents fit into your workflow,… this is a technical working session you should not miss. Without Sigasi, AI in chip design creates new problems further downstream and adds extra unnecessary costs. With Sigasi, AI in chip design gives you a competitive advantage and keeps your AI token spend under control.
Bring your own hard questions about where this breaks and challenge our engineers with your real world experiences.
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Validate AI generated code deterministically in real-time.
2026-09-03