We are celebrating our 10th Anniversary
Sigasi was founded 10 years ago, on January 21st 2008. What started small has been growing strongly in the last years.
Visit us at Semisrael 2017
Semisrael 2017 28th of November 2017 Airport City, Israel SemIsrael’s target is to form and support the online Israeli Semiconductors community.
Webinar: Boost VHDL development time with background design rule checking
Online Webinar Thursday, November 30, 2017 CET: 3:00 PM – 4:00 PM EST: 9:00 AM – 10:00 AM Design rule checking (DRC) is a battle-proven method to improve the quality of digital designs.
The pictures @ Demo Night #FPL2017
FPL came to Ghent this year, our hometown. We took some pictures on Demo Night, the pizzas were sponsored by Sigasi.
Sigasi supports #FPL2017
September 4 - 8, Ghent From September 4 until September 8, the 27th International Conference on Field Programmable Logic and Applications (FPL) takes place in Ghent.
Enlist your team for the Electroniad Quiz
Sigasi is proud to be the Silicon Sponsor at the 2nd Electroniad Quiz that takes place on September 14. Enlist your team now to take part in the quiz!
Visit us at the FPGA-Kongress in Munich
Sigasi is going to the FPGA-Kongress 2017 In Munich from Tuesday 11th until Thursday 13th of July The focus of the FPGA - Congress is on user-friendly solutions that can be quickly integrated into your own development.
The recording of the Sigasi Studio 3.5 demo
In case you have missed the Webinar, you can now watch the recording of the Sigasi Studio 3.5 Demo.
Full System Verilog Support: Sigasi in the news
We have grouped all the links to articles and interviews that were published after Sigasi Studio 3.5 was released with full SystemVerilog language support.
Sigasi makes the GarySmithEDA shortlist of "What to See at DAC 2017"
This year we’ve made it to the 22nd shortlist of GarySmithEDA “What to see @ DAC”. Out of 148 exhibiting companies, Sigasi has been shortlisted by the leading EDA industry analyst GarySmithEDA as one of the must-see companies at DAC 2017.
Sigasi Studio 3.5 brings full SystemVerilog language support
Sigasi Studio has supported Verilog and VHDL languages since 2008, the early knowledge of these languages allowed us to integrate additional SystemVerilog features in the existing tool.
Register for the Sigasi Studio 3.5 Demo
Learn about the new features of Sigasi Studio 3.5 in this Online Webinar We are organising a webinar to demonstrate the new and improved features of our Sigasi Studio 3.
Come see us at DAC 2017
Design Automation Conference 2017 Booth #1922 18-22 June 2017 Austin, Texas, US This year, we will exhibit again at the Design Automation Conference, better known as DAC.
Request your tutorial at ESC Boston
ESC Boston - Tutorial Thursday, May 4, 2017 We will offer a 20 minute Quick-Start "IDE for Hardware" tutorial every half hour on Thursday May 5 by appointment only.