Why Reading HDL Matters More Than Ever…
From Silicon Pioneers to Code Navigators
San Francisco, USA - October 20th, 2025
In the heart of Silicon Valley, Dirk Seynhaeve, our VP of Business Development, is paving the way for Sigasi in the ASIC world. When we asked Dirk to introduce our Linting Webinar to the American participants last week, he came up with his story, which we gladly share with you.
From Silicon Pioneers to Code Navigators: Why Reading HDL Matters More Than Ever…
In the 1980s, Verilog was a startup, VHDL was still being defined, and I was designing chips at Philips for the world’s first CD players, building circuits while the ink was still drying on the Compact Disc specification. Our debugging tools were optimism and coffee.
IMEC had just opened its doors. The EDA world back then? Pure frontier. My toolkit included oddities like Helix, LOGMOS, and Silage—a language for specifying hardware computations, not writing software.
Our “killer app”? Mentor Graphics’ schematic capture. Revolutionary then… primitive now. I spent nights wrestling with Silage’s assembler-like syntax, unknowingly teaching myself compiler theory and logic synthesis. Tools like Mustang optimized designs gate by gate—because every transistor counted.
We weren’t just engineers. We were toolmakers, shaping the future with what we had.
Fast-forward a few decades to 2025.
We solved the “how to create” problem: ⚙️ Faster design cycles 🧩 IP reuse 💡 High-Level Synthesis 🤖 AI-generated HDL
Creation became easy, but something got lost. Who’s reading the code?
- That mountain of legacy IP? Someone has to understand it.
- That “flawless” AI-generated module? Someone must verify it fits.
- That clever optimization? Someone needs to review it before tapeout.
When I first evaluated “Sigasi Visual HDL” before joining the team, I ran it on some dusty old designs—and was floored. Not because it made writing HDL easier (though it does), but because it made reading it effortless. For the first time, I admit, I could truly explore complex architectures without getting lost.
The revelation?
Engineers don’t just need better hammers. We need better magnifying glasses. You remain the captain but
- when creating, Sigasi Visual HDL is your co-pilot, catching syntax errors and guiding structure.
- when exploring, Sigasi Visual HDL is your navigator, tracing signals, revealing dependencies, and surfacing hidden stories.
(And yes, I’m using those words as professions, not products—no need to wake the trademark lawyers!😄 )
After three decades in this field, from hand-crafting gates to managing AI-assisted flows, I’ve learned something simple but profound: understanding existing code is often harder than writing new code.
The best engineers aren’t just creators. They’re detectives, translators, and archaeologists. The tools that embrace this truth don’t just check syntax; they help us think. Because the most advanced AI or HLS tool is only as valuable as our ability to understand what it produces. And sometimes, the most powerful feature isn’t the one that writes code faster—it’s the one that helps you see what’s already there.
💬 What do you think? As designs grow in complexity, do you spend more time writing or reading HDL? Feel free to leave your comments
Try the Features Dirk Is Talking About!
Request a free trial of our flagship Sigasi Visual HDL and discover how easy it is to save money and time on chip design. We gladly give you a free demo on top to get you started and maybe, if you are lucky, the demo is given by Dirk in person!
2025-10-20, last modified on 2025-10-21