Articles with tag "linting"

Check the list of all tags here.

• Linting with Sigasi Visual HDL (on demand) 2025-12-03
• The benefits of early detection 2023-01-06
• 12,000 Downloads and Counting 2025-12-11
• 10,000 Downloads and Counting 2025-12-10
• Introducing Linting In Chip Design Flow 2025-12-10
• Monitoring HDL code quality with Sigasi CLI and SonarQube 2023-06-07
• Using Sigasi CLI as a Git Commit Hook 2025-02-21
• Using Sigasi CLI for HDL Code Verification in GitLab CI 2025-01-14
• Using Sigasi CLI in Jenkins CI 2025-01-14
• Checking case statements in SystemVerilog 2024-06-19
• Multi-dimensional array and record checks in VHDL 2024-10-02
• Editing Broken Code in Sigasi Visual HDL 2024-06-19
• Array size mismatches with generic port widths 2025-02-21
• Deprecated IEEE Libraries 2024-10-23
• Static Checks for VHDL Code 2024-10-29