VS Code on Sigasi

How to monitor the memory use of Sigasi Visual HDL

Fri, 20 Sep 2024 00:00:00 +0000

On this page, we will briefly discuss how to monitor the memory use of Sigasi Visual HDL (SVH) , and potentially increase the allowed memory use if necessary.

Better call SAL

Wed, 07 Aug 2024 00:00:00 +0000

More than a year ago, we published a blog post discussing the effectiveness of using GitHub Copilot in combination with Sigasi (see original post). Since then, we’ve integrated our own AI tool, SAL (Sigasi AI layer), into Sigasi® Visual HDL™ (SVH™), making it a great time to revisit the topic. In this article, we used SAL in combination with various language models to evaluate its strengths and weaknesses.

Installing and maintaining Visual Studio Code / VSCodium with the Sigasi extension

Mon, 04 Mar 2024 00:00:00 +0000

In this article, we’ll discuss different ways to install and maintain Visual Studio Code and VSCodium with the Sigasi extension. Depending on your situation, one way may be more suitable than another. Let’s consider a few possibilities:

Exploring GitHub Copilot

Mon, 04 Dec 2023 00:00:00 +0000

Two years ago, GitHub Copilot was released as an AI-powered coding assistant. Since then, it has been widely used by software developers. So far, it has delivered very good results with programming languages such as C++ or Python. We decided to run some experiments to see how it would perform with hardware description languages. Here is what we have found out.

Tips and tricks to optimize Sigasi Visual HDL

Wed, 05 Jul 2023 00:00:00 +0000

In this blog, we will cover some tips to optimize CPU, build times, and disk space when using Sigasi Visual HDL (SVH) .

1. Cache this if you can

SVH comes with an integrated cache that increases performance by reducing resource load time. Over time, it will reduce build times and CPU consumption. A few tricks when setting up the cache:

Sigasi's Software Development Kit Part 2

Mon, 30 May 2022 00:00:00 +0000

In the previous installment of this blog, we talked about why you would want to integrate Sigasi’s SDK into your own product portfolio. To summarize our arguments:

The SDK allows you to offer an editing experience in your own product line that is similar to a full blown IDE.
Developing such capabilities from scratch would be prohibitively expensive.

So, hopefully by now you’re convinced you want to license our SDK … but now what? In this installment, we want to focus on some practical aspects of integrating our SDK. The goal is to make you aware of the (limited) additional work you might be confronted with.

7 reasons why you should try out our VS Code extension, number 4 will blow your mind 👀

Mon, 16 May 2022 00:00:00 +0000

Sigasi is always trying to innovate in the world of digital design. We have been developing and improving our Eclipse-based flagship product: Sigasi Visual HDL. This has improved the productivity of many digital designers around the world, making them focus on what’s really important: designing.

Sigasi's Software Development Kit Part 1

Mon, 25 Apr 2022 00:00:00 +0000

At Sigasi, we build tools to make you more productive. Specifically, we enhance your productivity during chip design with SystemVerilog and/or VHDL. For this purpose, two product lines are provided: Sigasi Studio for Eclipse and our Sigasi for VS Code extension. Both are focused on end-users.

How to configure VUnit using the Sigasi VS Code extension

Fri, 03 Dec 2021 00:00:00 +0000

Here at Sigasi, we are immensely devoted to the culture of testing. We believe in the power of test driven development and think it’s a great tool that can integrate with hardware design.
Integrating VUnit into SVH has let us give our users the ability to work with their HDL projects and use VUnit in their workflow.

Sigasi extension for VS Code

Fri, 17 Sep 2021 00:00:00 +0000

Sigasi extension for VS Code

It is Sigasi’s mission to make you better HDL design and verification engineers. You all have more important things to do than struggling with the complicated syntax and semantics of SystemVerilog and VHDL.