Testbench generation with Wavedrom

Tue, 20 Sep 2016 00:00:00 +0000

Intro

Last academic year (2015-2016), Winand Seldeslachts joined Sigasi to work on his masters thesis. For his thesis he investigated a new way to test VHDL code by extending Wavedrom. Wavedrom is a simple, textual language that is used to describe and visualized timing diagrams. Winand investigated how Wavedrom files could be used to generate input for VHDL testbenches.

WaveDrom Documentation Generation

Mon, 01 Jan 0001 00:00:00 +0000

WaveDrom is an application to draw waveform diagrams from a textual format called WaveJSON. Help us parse this format from code comments to generate documentation, including diagrams, and assist the user with autocompletion and validation while writing them.

Wavedrom on Sigasi

Testbench generation with Wavedrom

Intro

WaveDrom Documentation Generation