Xilinx on Sigasi

You can't write VHDL code without an intelligent editor!

Mon, 22 Aug 2011 00:00:00 +0000

Yesterday evening I was reading the latest edition of the Xilinx Xcell journal and encountered an interesting article about “How Do I Reset My FPGA”. This article gives some valuable tips and best practices on how to implement reset structures in FPGAs. The author also gives a VHDL code example on how to infer the reset structure of your choice. To my surprise the author –without doubt an experienced designer– made multiple VHDL errors in a simple code snippet:

List of known VHDL metacomment pragma's

Thu, 28 Apr 2011 00:00:00 +0000

Following up on a previous post, VHDL Pragmas, this is an incomplete list of supported VHDL pragmas, organized by vendor.

As an introduction, most pragmas have the following structure:

VHDL

-- trigger directive

where trigger is a keyword such as pragma or synthesis, and the directive is a special compiler directive. Many tools support several triggers, each with identical meaning.

Is Xilinx slowly dumping Modelsim?

Fri, 14 May 2010 00:00:00 +0000

For years, both Xilinx and Altera have provided a free version of Mentor Graphics’ Modelsim. This was a nice symbioses, since FPGA customers need a simulator in order to create designs. Xilinx and Altera have always provided EDA tools at a very low cost, and made their money on silicon rather than EDA software. Teams that create large hardware designs would still need an expensive full version of Modelsim, rather than the free version that comes with their FPGA tools.